1. Field of the Invention
The present invention relates to a monolithic assembly of thyristors having a common cathode and a single gate.
2. Discussion of the Related Art
Many currently-known thyristors are cathode-gate thyristors. FIG. 1A shows two such thyristors Th1 and Th2. A conventional implementation of these thyristors is schematically illustrated, in cross-sectional view, in FIG. 1B. Each thyristor is made from an N-type substrate N1, whose rear or lower surface is occupied by a P-type layer P1. On the front or upper surface side, there is a cathode-gate region P2, in which a cathode region N2 is formed. To improve the amount of voltage which the thyristor can withstand and to avoid various problems linked with slicings and brazings, the circumference of the thyristors generally is occupied by a P-type well P3, formed by drive-in from the upper and lower surfaces.
Such thyristors are well suited to common-anode assemblies. In such a case, the layers P1 of each of the thyristors are comprised of a single layer formed on the rear surface of substrate N1. This rear surface can then be mounted by brazing on a radiator.
However, some implementations of common-cathode assemblies with cathode gates raises problems. It is not desirable to perform, on the front surface, a single cathode metallization mounted on a radiator because the gate metallizations would then be short-circuited. Structures where the gate terminal is on the side opposite to the cathode surface may thus be desirable.
A first known solution is illustrated by a diagram in FIG. 2A. It consists of forming anode-gate thyristors. As shown in FIG. 2B, the structure of the thyristor is different from that shown in FIG. 1B. Still starting with an N-type substrate N1, a P-type layer P11, and then an N-type layer N12, are to be found on the rear surface of the substrate. On the front surface side, P-type anode regions P13 and a highly-doped N-type region N14 for contacting the gate are formed. A P-type well P15 connects the circumference of layer P11 to the upper surface.
An advantage of this structure is that it uses many fabrication steps which are common with the structure of FIG. 1B. Indeed, the initial steps of forming well P15 and then layer P11 are identical to the steps of forming well P3 and then layer P1 of the structure of FIG. 1B. A disadvantage of this structure is that the control is performed through a gate voltage referenced on the anode voltage, which is a high voltage when the cathode is connected to the ground. Another disadvantage is that this gate has to be negatively biased with respect to the anode whereas, in current electric circuits, it is generally easier to generate a positive control voltage than a negative control voltage. Another disadvantage is that, generally, anode-gate thyristors are less responsive than cathode-gate thyristors.
A second solution is illustrated by a diagram in FIG. 3A. It enables to improve the circuit of FIG. 2A with respect to responsiveness and also the possibility of triggering by a positive gate voltage taking the cathode, and not the anode, as a reference. In this solution, the anode gates of thyristors Th1 and Th2 are connected to the anode of a thyristor Th3, the cathode of which is connected to the common cathodes of thyristors Th1 and Th2. A connection is taken on the cathode gate to be used as the positive gate terminal G.
As shown in FIG. 3B, each of thyristors Th1 and Th2 has the same anode-cathode structure as the thyristors of FIG. 2B. The difference lies in the control structure which is comprised of a region P16 formed on the upper surface side, in which a region N17 is formed. Region N17 is connected by a wire 10 to the cathode. Region P16 is coated with a metallization connected to a gate terminal G. The disadvantage of this structure is that its surface area is large, since a significant guard distance between regions P13 (at the anode potential) and region P16 (at the cathode potential) is provided to ensure a sufficient voltage withstand. Further, the connection between a terminal of the front surface and the rear surface with a wire 10 makes the assembly more complex.
It should be noted that, in the implementations of FIGS. 2B and 3B, well P15 only has the function of protecting the circumference of the junction ensuring the forward voltage withstand capability between substrate N1 and layer P11. Indeed, this voltage withstand capability would be reduced if the junction emerged on a lateral surface. Well P15 is not connected to any terminal.